Image display apparatus

ABSTRACT

An image display apparatus capable of adjusting a display picture by an input unit through a computer body is disclosed. When the user inputs a control instruction for adjusting the display picture of the display unit by the input unit connected to the computer body, a control signal addition circuit prepares a control signal Sc corresponding to the control instruction and adds the control signal to a video signal R, G or B or a synchronizing signal Hs or Vs produced by a display control circuit during a vertical retrace period. A control signal separation circuit separates the added control signal Sc from the video signal R, G or B or the synchronizing signal Hs or Vs produced by the control signal addition circuit. A display control circuit produces adjustment signals Sa and Sb on the basis of the control signal from the control signal separation circuit to adjust a video circuit and a deflection circuit. Thus, the user can adjust the display picture by the input unit near at hand without extending the hands to adjustment switches of the display unit.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to an image display apparatusincluding an input unit such as a keyboard, a computer body and adisplay unit, and more particularly to an image display apparatus inwhich a display size, a display position and brightness of a picture inthe display unit can be adjusted by the input unit such as the keyboardthrough the computer body to improve the handling capability. The imagedisplay apparatus of the present invention can be used in a work stationand an advanced personal computer using a display unit.

[0002] At present, in the display units for a computer terminal, thedisplay position and size of the picture and a deflection frequency of avideo signal to be displayed are variously different. Accordingly, onedisplay unit for the computer terminal is designed to be able to treatvarious video signals.

[0003] The display unit of this type employs a microcomputer and an LSImemory to provide an optimum picture display for each kind of videosignals. Such a display unit in a prior art is disclosed in JapanesePatent Unexamined Publication No. 1-321475, for example.

[0004] This conventional display unit is directed to a multi-scan typeCRT display unit, which includes a memory in which information relativeto display positions and sizes of the picture is stored for each kind ofvideo signals and which is controlled by a microcomputer in that displayunit. The information relative to the optimum display position and sizeof the picture in accordance with an input video signal is read out fromthe memory and a deflection circuit of the display unit is controlled bythe read-out information. Further, when a video signal inputted in thedisplay unit is not known, the memory stores no information relative tothe inputted video signal and accordingly adjustment switches disposedon a front panel of the display unit are operated without theintervention of the computer so that information for adjusting thedisplay position and the display size of the picture is inputted. Acontrol circuit such as the microcomputer prepares information forcontrol including deflection and makes adjustment.

[0005] In the prior art described above, the display unit is designed toobtain the optimum picture display in accordance with the input videosignal, while, in another prior art, a display state is controlled to beswitched from the computer body in accordance with the variety of themulti-media. Such a display unit in the prior art is disclosed inJapanese Patent Unexamined Publication No. 2-60193.

[0006] This conventional display unit is directed to a CRT displayapparatus used in display of an electronic apparatus such as a personalcomputer and which can switch the number of scanning lines between 200lines and 400 lines freely and be shared by a television receiver.

[0007] More particularly, in the above prior art, the computer bodyproduces a discrimination signal superposed on an video signal during ablanking period and the display unit switches the deflection frequencyon the basis of the discrimination signal.

[0008] In the former prior art (Publication No. 1-321475) of the abovetwo prior arts, since the display position and size of the picture areall controlled by the display unit, it is necessary for the operator toseparate his fingers from the input unit such as the keyboard connectedto the computer body and extend his hands to the adjustment switches ofthe display unit disposed at a separate location to operate the switcheswhen the adjustment of the display position and size of the picture arerequired. Accordingly, it is troublesome in the handling capability.

[0009] Further, in the latter prior art (Publication No. 2-60193), thedisplay state is controlled by the input unit such as the keyboardconnected to the computer body, while since only the deflectionfrequency can be switched only by a binary value, there is a problemthat only two specific signals can be treated and a sufficient displaystate required by the user of the computer can not be obtained.

SUMMARY OF THE INVENTION

[0010] It is a primary object of the present invention to solve theproblems in the prior arts by providing an image display apparatuscapable of adjusting a display picture by an input unit such as akeyboard near at hand through a computer body without extending thehands to adjustment switches of a display unit and obtaining a displaystate required by the user exactly.

[0011] It is another object of the present invention to improve theoperability in a computer system and the handling capability of theimage display apparatus.

[0012] It is still another object of the present invention to provide animage display apparatus capable of adjusting a display picture from acomputer body by using a conventional circuit without the provision of anew circuit.

[0013] In order to solve the above problems, according to the presentinvention, in a general computer system, a computer body comprisesaddition means for adding a control signal for a display picture to avideo signal or a synchronizing signal and a display unit comprisesseparation means for separating the added control signal and controlmeans for adjusting the display state on the basis of the separatedcontrol signal.

[0014] Alternatively, the computer body comprises preparation means forpreparing the control signal to produce it with a predetermined systemand the display unit comprises control means for receiving the controlsignal to adjust the display state on the basis of the control signal.

[0015] Alternatively, the computer body comprises display processingmeans for producing the prepared image data and the control signal forthe display picture in the form of a digital signal to the display unitand the display unit comprises control means for preparing an analogvideo signal and synchronizing signal from the image data and producingan adjustment signal for adjusting a predetermined location of thedisplay unit on the basis of the control signal.

[0016] Alternatively, the computer body comprises modulation means foradding the control signal for the display picture to an AC power supplyfor operating the computer body and the display unit comprisesdemodulation means for separating the modulated control signal andcontrol means for adjusting an internal circuit of the display unit bythe control signal from the demodulation means to obtain a predetermineddisplay picture.

[0017] Further alternatively, the control signal from the input unitsuch as the keyboard is received by the display unit as it is and thedisplay unit comprises instruction identification means for identifyingthe control signal relative to the adjustment of the display picture andcontrol means for adjusting the display picture on the basis of a signalfrom the instruction identification means.

[0018] The addition means of the computer body adds the control signalfor the display unit to the video signal or the synchronizing signalproduced by the computer body when the instruction inputted by the inputunit such as the keyboard relates to the adjustment of the displaypicture of the display unit. In the display unit, the separation meanstakes out the added control signal and the control means adjusts theinternal circuit of the display unit in accordance with the controlsignal to thereby display a predetermined picture.

[0019] Alternatively, the preparation means prepares a control signal inaccordance with the control signal for the display picture from theinput unit such as the keyboard and produces it through an exclusiveconnection line, and when the control means of the display unit receivesthe control signal, the control means adjusts a predetermined portion ofthe internal circuit of the display unit in accordance with the controlsignal and adjusts the display picture.

[0020] Alternatively, the display processing means processes a drawinginstruction prepared by a CPU in the computer body to prepare image datafor displaying a video signal and prepare a control signal for thedisplay picture, so that the image data and the control signal areproduced to the display unit with a predetermined system fortransmission and reception of a digital signal. Further, the controlmeans receives the image data and the control signal from the displayprocessing means and prepares the video signal, the synchronizing signaland the adjustment signal for the internal circuit of the display unit.

[0021] Alternatively, the modulation means prepares the control signalfor the display picture from the information or instruction relative tothe adjustment of the display picture and adds the control signal to theAC power supply for the computer body to transmit the control signal.The demodulation means extracts the control signal added by themodulation means. The control means adjusts a predetermined portion ofthe internal circuit of the display unit on the basis of the controlsignal from the demodulation means to adjust the display picture.

[0022] Further alternatively, the instruction identification meansidentifies a signal relative to the adjustment of the display picturefrom signals directly inputted by the input unit such as the keyboard toprepares the control signal for adjustment. The control means adjuststhe predetermined portion of the internal circuit of the display unit inaccordance with the control signal from'the instruction identificationmeans to adjust the display picture.

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Preferred embodiments of the present invention will now bedescribed in conjunction with the accompanying drawings, in which:

[0024]FIG. 1 is a block diagram schematically illustrating a firstembodiment of an image display apparatus according to the presentinvention;

[0025]FIG. 2 is a block diagram schematically illustrating an actualexample of a control signal addition circuit and a display controlcircuit shown in FIG. 1;

[0026]FIG. 3 is a waveform diagram of signals of FIG. 2;

[0027]FIG. 4 is a block diagram schematically illustrating an actualexample of a control signal separation circuit and the display controlcircuit shown in FIG. 1;

[0028]FIG. 5 is a waveform diagram of signals of FIG. 4;

[0029]FIG. 6 is a block diagram schematically illustrating anotheractual example of the control signal addition circuit and the displaycontrol circuit shown in FIG. 1;

[0030]FIG. 7 is a block diagram schematically illustrating a secondembodiment of an image display apparatus according to the presentinvention;

[0031]FIG. 8 is a block diagram schematically illustrating a thirdembodiment of an image display apparatus according to the presentinvention;

[0032]FIG. 9 is a block diagram schematically illustrating a fourthembodiment of an image display apparatus according to the presentinvention; and

[0033]FIG. 10 is a block diagram schematically illustrating a fifthembodiment of an image display apparatus according to the presentinvention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034]FIG. 1 is a block diagram schematically illustrating a firstembodiment of an image display apparatus according to the presentinvention. In FIG. 1, numeral 1 a denotes a computer body, in whichnumeral 11 a CPU, 12 an input unit interface connected to the computerbody la for processing various instruction signals inputted from a firstinput unit 10 (which transmits a user's intention to the computer) suchas a keyboard, a mouse, a pen for input, 13 a memory circuitconstituting a main memory, 14 an input/output port for connection witha peripheral device not shown, 15 a display control circuit forproducing a video signal and a synchronizing signal for driving adisplay unit, 16 a control signal addition circuit for superposing oradding a control signal to the video signal or the synchronizing signalproduced by the display control circuit 15, and 17 an external memoryconstituted by a floppy disk, a hard disk or a memory card which isdisposed separately from the memory circuit 13. Further, numeral 1 bdenotes a display unit, in which numeral 18 denotes a control signalseparation circuit for extracting the control signal from the videosignal or the synchronizing signal on which the control signal producedby the control signal addition circuit 16 is superposed, 19 a firstdisplay control circuit for producing an adjustment signal for apredetermined circuit on the basis of the control signal extracted bythe control signal separation circuit 18, 20 a video circuit, 21 adeflection circuit constituting display drive means, and 22 a cathoderay tube for displaying a video signal.

[0035] Operation of FIG. 1 is now described. In the computer body 1 a,other portions except the control signal addition circuit 16 are thesame as the general configuration of a conventional personal computer orwork station.

[0036] When the user of the computer inputs a control instruction foradjustment of the display picture in the display unit 1 b by means of afirst input unit 10 such as a keyboard, a mouse, a pen for inputconnected to the computer body 1 a, the input unit interface 12 convertsthe control instruction into a digital signal, which is recognized bythe CPU 11 which controls the control signal addition circuit 16.

[0037] The control signal addition circuit 16 prepares a control signalSc in accordance with the control instruction. The control signal Sc forthe display unit 1 b is superposed during the vertical retrace period onthe video signal R, G or B or the synchronizing signal for displayproduced by the display control circuit 15. The signal on which thecontrol signal Sc is superposed is represented with the prime (′). Thecontrol signal Sc is prepared in accordance with the control instructioninputted in the input unit 10.

[0038] The control signal separation circuit 18 of the display unit lbseparates the added control signal Sc from the video signal R, G or B orthe synchronizing signal Hs or Vs produced by the control signaladdition circuit 16 to supply it the first display control circuit 19and supplies the video signals R, G and B to the video circuit 20 andthe synchronizing signals Hs and Vs to the deflection circuit 21,respectively.

[0039] The first display control circuit 19 produces adjustment signalsSa and Sb for the video circuit 20 and the deflection circuit 21 on thebasis of the inputted control signal Sc, respectively, and supplies thesignals Sa and Sb to the video circuit 20 and the deflection circuit 21,respectively, to adjust them.

[0040] In this way, the display picture is adjusted, so that the user'sdesired picture is displayed in the cathode ray tube 22.

[0041]FIG. 2 is a block diagram schematically illustrating an actualexample of the control signal addition circuit 16 of FIG. 1 and FIG. 3is a waveform diagram illustrating waveforms of signals in FIG. 2.

[0042] In FIG. 2, numeral 161 denotes an address decoder, 162 a datalatch circuit, 163 an edge detection circuit for detecting an edge of apulse, 164 a shift register circuit, 165 and 170 AND circuits, 166 alevel conversion circuit for converting a level of a signal, 167 ananalog switch, 168 a counter circuit for counting 17 clock pulses, and169 a set and reset type flip-flop circuit (hereinafter, referred to asan RSFF circuit).

[0043] Operation of FIG. 2 is now described.

[0044] As described above, when the user of the computer inputs thecontrol instruction for adjustment of the display picture of the displayunit lb by means of the input unit 10 connected to the computer 1 a, theinput unit interface 12 supplies the control instruction to the CPU 11through a computer bus BUS. Then, the CPU 11 recognizes the controlinstruction and supplies a control data C_(D) to the control signaladdition circuit 16 through the computer bus BUS.

[0045] The address decoder 161 supplies the control data C_(D) to thedata latch circuit 162 when the control data supplied to the decoder isa control data for adjusting the display picture of the display unit lb.Then, the edge detection circuit 163 detects a leading edge of thevertical synchronizing signal Vs by means of the horizontalsynchronizing signal Hs and supplies the edge detection pulse Pe to theshift register circuit 164, the counter circuit 168 and the RSFF circuit169.

[0046] The counter circuit 168 is supplied with the edge detection pulsePe as a reset signal and with the horizontal synchronizing signal Hs asa clock signal and starts its counting operation in response to therising edge of the clock signal. When the counter circuit 168 counts 17clocks after input of the reset signal, the counter circuit produces acarry output signal Sca which is supplied to a reset input terminal ofthe RSFF circuit 169. Thus, the RSFF circuit 169 produces a V gate pulsePv as shown in FIG. 3. The control signal Sc for the display unit lb issuperposed during a high level period T_(H) of the V gate pulse Pv.

[0047] On the other hand, the shift register circuit 164 reads thecontrol data C_(D) held in the data latch circuit 162 in response to theedge detection pulse Pe supplied from the edge detection circuit 163.The shift register circuit 164 performs the shift operation in responseto the clock signal constituted by the horizontal synchronizing signalHs produced from the AND circuit 170 during the high level period T_(H)of the V gate pulse to produce the control data C_(D)′ shown in FIG. 3.

[0048] Further, the control data C_(D)′ is supplied to the AND circuit165 which produces a logical product of the control data C_(D)′ and thehorizontal synchronizing signal Hs. The output signal of the AND circuitis converted into a video signal level by the level conversion circuit166 to be supplied to the switch circuit 167. Other input of the switchcircuit 167 is supplied with a B (blue) video signal directly withoutbeing processed, and the switch circuit 167 selects the output of thelevel conversion circuit 166 during the high level period T_(H) and theB video signal during other low level period T_(L) by using the V gatepulse Pv as a change-over control signal for the switch to be able toobtain a B′ video signal on which the control signal is added as shownin FIG. 3. In the embodiment, the control signal Sc is added to the Bvideo signal having a low visual sensitivity of color, while the controlsignal may be added to other R (red) or G (green) visual signal or thesynchronizing signal Hs or Vs.

[0049]FIG. 4 is a block diagram schematically illustrating a firstembodiment of the control signal separation circuit 18 and the firstdisplay control circuit 19 of FIG. 1 and FIG. 5 is a waveform diagramshowing waveforms of signals in FIG. 4.

[0050] In FIG. 4, numeral 401 denotes a distributer, 402 a low passfilter (hereinafter referred to as an LPF), 403 a level conversioncircuit, 404 and 405 buffers, 406 a'divide-by-17 counter or 17-stepcounter, 407 an RSFF circuit, 408 and 409 AND circuits, 410 an inverter,411 a 16-stage shift register, 412 a decoder circuit, 413 a D/Aconversion circuit (hereinafter referred to as a D/AC), and 414 an edgedetection circuit.

[0051] Operation of FIG. 4 is now described with reference to FIG. 5.

[0052] The B′ video signal from the control signal addition circuit 16is supplied to the distributer 401 which divides the video signal intotwo signals, one of which is supplied to the video circuit 20 shown inFIG. 1 together with other video signals R and G and the other of whichis supplied to the LPF 402. With the B′ video signal supplied to the LPF402, an unnecessary frequency component such as noise contained in theB′ video signal is removed in the LPF 402 and the B′ video signal isthen converted into a digital signal level in the level conversioncircuit 403.

[0053] Further, the vertical synchronizing signal Vs is supplied throughthe buffer 404 to the edge detection circuit 414, in which the leadingedge thereof is detected and is supplied to the 17-step counter 406, theRSFF circuit 407 and the 16-stage shift register 411 as an edgedetection pulse 418 shown in FIG. 5.

[0054] When the 17-step counter circuit 406 is reset by the edgedetection pulse 418, the 17-step counter circuit 406 starts its countingoperation for the horizontal synchronizing signal Hs supplied throughthe buffer 405 as a clock signal. Thus, when rising edges of 17 clocksare counted, the counter circuit produces a 17-clock detection pulse.The RSFF circuit 407 is set by the edge detection pulse 418 and reset bythe 17-clock detection pulse to produce the V gate pulse 419 shown inFIG. 5.

[0055] The AND circuit 408 takes a logical product of an output signalof the level conversion circuit 403 and the V gate pulse of the RSFFcircuit 407 to extract the control signal 420 added to the B′ videosignal. Further, the other AND circuit 409 takes a logical product ofthe V gate pulse and the horizontal synchronizing signal Hs produced bythe buffer 405 and inverted by the inverter 410 to produce a clocksignal for the 16-stage shift register 411 and the D/AC (D/A Converter)413.

[0056] The 16-stage shift register 411 is reset by the edge detectionpulse 418 to clear the held contents thereof and successively holds thecontrol signal 420 in response to the clock signal from the AND circuit409. The decoder circuit 412 decodes four held values at the first,second, fifteenth and sixteenth stages of the 16-stage shift register411, and when the decoder circuit detects the start bit and the stop bitin the control signal 420, the decoder circuit produces a load pulse 422for the D/AC 413. Further, the output signal from the second-stage ofthe shift register 411 is used as a serial data 421 of the D/AC 413shown in FIG. 5.

[0057] The D/AC 413, which is a serial input and multi-channel D/Aconverter, selects any of a plurality of D/A converters included thereinin accordance with D/AC control address in the serial data 421 shown inFIG. 5 and updates the D/A converted output value in accordance with avalue of the control data portion. At this time, the serial data 421 issuccessively taken in the D/AC 413 in synchronism with the clock signalfrom the AND circuit 409 and is settled by the rising edge (UP) of theload pulse from the decoder 412.

[0058] Thus, the video circuit 20 and the deflection circuit 21 shown inFIG. 1 can be adjusted by an adjustment voltage or current produced fromthe D/AC 413 as an adjustment signal.

[0059]FIG. 6 is a block diagram schematically illustrating a secondactual example of the control signal separation circuit 18 and thedisplay control circuit 19 of FIG. 1. In FIG. 6, numeral 601 denotes aselector, 602 a one-chip microcomputer, and 603 a writable read-onlymemory (hereinafter referred to as EEPROM (Electric ErasableProgrammable Read Only Memory)). Other elements having the same numberas in FIG. 4 have the same function.

[0060] Operation of FIG. 6 is now described.

[0061] The operation that the control signal Sc added to the B′ videosignal is separated by the AND circuit 408 and the clock signal forwriting of the shift register 411 is prepared by the AND circuit 409 isquite the same operation as that of FIG. 4. In the second example, themicrocomputer 602 is used to process the control signal to the displayunit lb sent from the computer body la shown in FIG. 1.

[0062] First of all, usually, the microcomputer 602 controls theselector 601 to select the clock signal for writing from the AND circuit409 and write the control signal in the shift register circuit 411. Atthis time, the edge detection pulse from the edge detection circuit 414is supplied to the microcomputer 602 as an interrupt signal 418 andafter a predetermined time the microcomputer 602 controls the selector601 by a selector control signal Ss to select the clock signal S_(CL)for reading from the microcomputer 602.

[0063] The control signal held in the shift register circuit 411 issuccessively read out in response to the clock signal S_(CL) for readingfrom the microcomputer 602 and is supplied to the microcomputer 602.When the signal supplied to the microcomputer is the correct controlsignal, the microcomputer 602 produces the control data to supply it tothe D/AC 413 to thereby adjust a predetermined circuit in the displayunit lb. Further, the control data is also written in the EEPROM 603.Thus, when the display unit lb is next turned on, the control data isread out from the EEPROM 603 to perform the predetermined adjustment.

[0064] Further, in the second example, by previously storing the controldata in the EEPROM 603, a necessary control data can be read out inaccordance with the control signal S_(C) from the computer body la.Accordingly, the control information for the display unit lb can bepreviously programmed in the software for operating the computer body inaddition to the control information from the input unit 10, so that apredetermined adjustment can be made for each software.

[0065] As described above, in the first embodiment of the presentinvention, the control signal is added to the video signal or thesynchronizing signal during the vertical retrace period, while a DClevel itself of the video signal can be used as the control signal. Inthis case, the control signal separation circuit 18 may reproduce the DClevel of the video signal and adjust the predetermined circuit of thedisplay unit lb in accordance with a voltage value of the DC level.Further, in the first embodiment, the video circuit 20 and thedeflection circuit 21 of the display unit lb are adjusted, while ahigh-voltage circuit portion can be naturally controlled to adjust thefocus or the like.

[0066]FIG. 7 is a block diagram schematically illustrating a secondembodiment of the present invention. In FIG. 7, numeral 1 c denotes acomputer body different from the computer body shown in FIG. 1 and inthe computer body 1 c, numeral 70 denotes a control signal preparationcircuit. Further, numeral 1 d denotes a display unit different from thedisplay unit shown in FIG. 1 and in the display unit 1 d, numeral 71denotes a second display control circuit different from the firstdisplay control circuit 19 shown in FIG. 1. Other elements designated bythe same numerals as those of FIG. 1 have the same function as that ofthe elements of FIG. 1.

[0067] Operation of FIG. 7 is now described briefly.

[0068] In FIG. 7, the video signal and the synchronizing signal areproduced by the display control circuit 15 in the same manner as in ageneral personal computer or work station.

[0069] When the user of the computer inputs the control instruction foradjusting the display picture of the display unit 1 d by means of theinput unit 10 connected to the computer body 1 c, the controlinstruction is sent to the control signal preparation circuit 70 throughthe input unit interface 12, the CPU 11 and the computer bus BUS.

[0070] The control signal preparation circuit 70 holds the controlinstruction and prepares the control signal corresponding to the controlinstruction to produce it to the display unit 1 d at a proper timing. Anoutput system of the control signal at this time can use an existinginterface such as, for example, RS-232C, GP-IB and SCSI. Accordingly,the control signal preparation circuit 70 includes the interfacecircuit.

[0071] The second display control circuit 71 of the display unit 1 dreceives the control signal produced by the control signal preparationcircuit 70 through the same interface circuit as that included in thecontrol signal preparation circuit 70 and produces the adjustmentvoltage or current for the video circuit 20 and the deflection circuit21 as the adjustment signal on the basis of the received control signalto adjust the video circuit 20 and the deflection circuit 21.

[0072] In the second embodiment of the present invention, since thecontrol signal is transmitted and received by means of thegeneral-purpose interface, bi-directional communication between thedisplay unit 1 d and the computer body 1 c can be made. Accordingly, thecomputer body can recognize whether the display unit 1 d has receivedthe control signal exactly or not, how the control state of the displayunit 1 d at the current time is or whether the display unit 1 d isexactly operated or not.

[0073]FIG. 8 is a block diagram schematically illustrating a thirdembodiment of the present invention. In FIG. 8, numeral 1 e represents acomputer body different from that of FIGS. 1 and 7 and in the computerbody 1 e, numeral 81 represents a display processing circuit forpreparing an image data for a display image, and 82 an interfacecircuit. Numeral 1 f represents a display unit different from that ofFIGS. 1 and 7, 83 an interface circuit, and 84 a display controller forpreparing various signals for driving the display unit 1 f. Theinterface circuits (hereinafter referred to as an I/F circuit) 82 and 83serve to transmit and receive signals between the display processingcircuit 81 in the computer body 1 e and the display controller 84 in thedisplay unit 1 f. Other elements having the same numerals as those ofFIGS. 1 and 7 have the same function.

[0074] Operation of FIG. 8 is now described.

[0075] An image processing instruction issued by the CPU 11 is suppliedto the display processing circuit 81 through the computer bus BUS. Thedisplay processing circuit 81 receives the image processing instructionand prepares the image data for the display image.

[0076] At this time, when the user of the computer inputs the controlinstruction for adjusting the display picture of the display unit 1 f bymeans of the input unit 10 connected to the computer body 1 e, thecontrol instruction is sent to the display processing circuit 81 throughthe input unit interface 12, the CPU 11 and the computer bus. When thedisplay processing circuit 81 receives the control instruction, thedisplay processing circuit 81 prepares the control signal in apredetermined location other than the image data area.

[0077] The image data and the control signal thus prepared are sent tothe display unit 1 f through the I/F circuit 82 as the image informationin accordance with a predetermined interface specification, for example,the SCSI standards having a large transfer rate.

[0078] In the display unit 1 f, the I/F circuit 83 receives the imageinformation from the I/F circuit 82 and supplies the image informationto the display controller 84 successively. The display controller 84writes the received image information into an internal memorysuccessively and prepares the video signals for R, G and B and thesynchronizing signal from the image data portion of the written imageinformation. Further, when the control signal is present in the imageinformation, the adjustment voltage or current as the adjustment signalsSa′ and Sb′ for the video circuit 20 and the deflection circuit 21 isproduced to adjust the video circuit 20 and the deflection circuit 21.

[0079] In addition, when the image information written in the internalmemory of the display controller 84 is not updated within apredetermined time, the display controller 84 controls the video circuit20 to minimize an amplitude level of the video signal, so that thebrightness of the cathode ray tube 22 is reduced to prevent burning ofthe cathode ray tube 22.

[0080] Even in the third embodiment of the present invention, since theinterfaces between the computer body 1 e and the display unit 1 f havethe capability for bidirectional communication, not only the image dataand the control signal can be transmitted from the computer body 1 e butalso a signal for reception confirmation and a report signal foroperation situation can be transmitted from the display unit 1 f.Further, since the computer body 1 e is connected to the display unit 1f through a single interface cable, the complexity of the connection canbe solved.

[0081]FIG. 9 is a block diagram schematically illustrating a fourthembodiment of the present invention. In FIG. 9, numeral 1 g represents acomputer body different from that of FIGS. 1, 7 and 8, and in thecomputer body 1 g, numeral 91 represents a modulation circuit. Numeral 1h represents a display unit different from that of FIGS. 1, 7 and 8, andin the display unit 1 h, numeral 92 represents a display controlcircuit, 93 a demodulation circuit and 94 and 95 power plugs. Otherelements having the same numerals as those of FIG. 1 have the samefunction.

[0082] Operation of FIG. 9 is now described.

[0083] When the user of the computer inputs the control instruction foradjusting the display picture of the display unit 1 h by means of theinput unit 10 connected to the computer body 1 g, the controlinstruction is supplied to the CPU 11 through the input unit interface12. The CPU 11 processes the control instruction and supplies thecontrol signal corresponding to-the control instruction to themodulation circuit 91 through the computer bus BUS. The modulationcircuit 91 modulates the received control signal and superposes it tothe AC power to transmit the signal from the power-plug 94 through apower line PL to the display unit 1 h.

[0084] In the display unit 1 h, when the AC power is supplied from thepower plug 95 through the power line PL, the demodulation circuit 93demodulates the modulated control signal superposed on the AC power toreproduce the original control signal. The reproduced control signal issupplied to the display control circuit 92. The display control circuit92 produces the adjustment voltage or current as the adjustment signalsSa and Sb for the video circuit 20 and the deflection circuit 21 inaccordance with the contents of the control signal to adjust the videocircuit 20 and the deflection circuit 21.

[0085] In this manner, in the embodiment, since the control signal istransmitted to the display unit 1 h through the power line PL, thedisplay unit 1 h can be controlled without increased signal line for thecontrol signal.

[0086]FIG. 10 schematically illustrates a fifth embodiment of thepresent invention. The fifth embodiment is now described briefly. InFIG. 10, numeral 1 represents a computer body constituted by a generalpersonal computer or work station, 1 j a display unit different fromthat of the preceding embodiments 101 a second input unit such as akeyboard, a mouse, or a pen for unit connected to the computer body 1and the display unit 1 j, 102 a command identification circuit in thedisplay unit, and 103 a third display control circuit. Other elementshaving the same numerals as those of FIG. 1 have the same function.

[0087] In FIG. 10, when the user of the computer operates the secondinput unit 101, an input signal such as the control instruction isinputted to the computer body 1 and the display unit 1 j. The inputsignal inputted to the display unit 1 j is processed by the commandidentification circuit 102 and is taken out as the display controlsignal when the input signal is an instruction relative to the displaycontrol. The third display control circuit 103 makes control relative tothe display operation by the control voltage or current with respect tothe associated portion of the video circuit 20 and the deflectioncircuit 21 on the basis of the display control signal. In the embodimentof FIG. 10, since the computer body does not prepare the control signalfor the display, there is no burden bearing upon the CPU of thecomputer. In this manner, the user of the computer can control thedisplay unit by means of the second input unit without direct contact tothe display unit. The signal line connected from the second input unit101 to the display unit 1 j may use the signal lines connected to thecomputer body 1 as they are or may be an exclusive signal line fortransmitting only the display control signal. For the former case, theinput unit such as the general keyboard can be utilized as it is. Forthe latter case, it is necessary to add a special input unit for displaycontrol to the second input unit. Further, a remote control circuitemploying the infrared rays or the like is used to reduce the number ofconnection lines between the second input unit 101 and the display unit1 j, so that the complexity due to wiring can be reduced. In the fifthembodiment, an input unit such as a mouse, a touch panel, a pen forinput or the like can be naturally used as the input means for thecontrol instruction in addition to the keyboard.

[0088] According to the present invention, the following effects areattained:

[0089] (1) The user of the computer can adjust the display picture bythe input unit such as the keyboard near at hand through the computerbody without extending the hands to adjustment switches of the displayunit.

[0090] (2) The user can obtain the necessary display state exactly.

[0091] (3) The operability in the computer system and the handlingcapability of the display unit are improved.

[0092] (4) The individual user can adjust the display state of the imagedisplay apparatus in accordance with circumstances.

[0093] (5) The adjustment of the display picture can be attained withthe minimum control hardware.

[0094] (6) Standard lines can be used without the provision of newlines.

[0095] (7) The complexity due to wiring can be avoided by using theremote control circuit.

[0096] (8) It is possible to automatically adjust the optimum picture tobe displayed on the display unit by adjusting the operation of softwareby means of the control program of a display integrated into theapplication program at the computer side, and accordingly it isunnecessary for the user to take care the adjustment of the display.

1. An image display apparatus including an input unit, a computer bodyand a display unit, wherein said computer body comprises addition meansfor preparing a control signal Sc on the basis of an control instructioninputted by said input unit for adjusting a display picture of saiddisplay unit and for adding said control signal to a video signal R, Gor B or a synchronizing signal Hs or Vs produced separately for drivingsaid display unit to be produced to said display unit, and said displayunit comprises separation means for separating said added control signalfrom said video signal or said synchronizing signal produced by saidaddition means and display control means for producing an adjustmentsignal on the basis of said control signal produced from said separationmeans to adjust display drive means in said display unit.
 2. An imagedisplay apparatus according to claim 1, wherein said computer bodycomprises a CPU and signal generation means for producing said videosignal and producing a horizontal synchronizing signal Hs and a verticalsynchronizing signal Vs as said synchronizing signal, and said additionmeans comprises a hold circuit for holding said control instructioninputted by said input unit and supplied through said CPU, a shiftregister circuit for taking in contents of said hold circuit with saidvertical synchronizing signal Vs as a reference, a counter circuit forcounting said horizontal synchronizing signal Hs by a predeterminedvalue with said vertical synchronizing signal Vs as a reference, a gatecircuit for supplying said horizontal synchronizing signal as a readingclock of said shift register circuit until said counter circuit countsby the predetermined value with said vertical synchronizing signal Vs asthe reference, a level conversion circuit for converting a level of asignal read out from said shift register circuit into a level of saidvideo signal produced by said signal generation means, and a selectioncircuit for selecting an output of said level conversion circuit duringan output period of said gate circuit and selecting said video signalduring other period.
 3. An image display apparatus according to claim 1,wherein said display unit comprises a video circuit and a deflectioncircuit, and said control means comprises a plurality ofdigital-to-analog conversion circuits, whereby a predetermineddigital-to-analog conversion circuit is selected from said plurality ofdigital-to-analog conversion circuits on the basis of addressinformation included in said control signal Sc produced by saidseparation means and control data included in said control signal Sc isconverted into an adjustment voltage or current as said adjustmentsignal by said digital-to-analog conversion circuit to adjust said videocircuit and said deflection circuit.
 4. An image display apparatusaccording to claim 1, wherein said display unit comprises a videocircuit and a deflection circuit, and said control means comprises amicrocomputer, a nonvolatile memory and a plurality of digital-to-analogconversion circuits, wherein when a power supply of said display unit isturned on, control information stored in said nonvolatile memory is readout by said microcomputer to be supplied to a predetermined circuit ofsaid plurality of digital-to-analog conversion circuits so that saidvideo circuit and said deflection circuit are adjusted by an output ofsaid digital-to-analog circuit, and when said control signal Sc isproduced by said separation means, said control signal is processed bysaid microcomputer to be supplied to a predetermined circuit of saidplurality of digital-to-analog conversion circuits so that said videocircuit and said deflection circuit are adjusted by an output of saiddigital-to-analog conversion circuit and said control signal is writtenin said nonvolatile memory as said information.
 5. An image displayapparatus according to claim 1, wherein said addition means adds saidprepared control signal Sc to said separately produced video signal R, Gor B during a vertical blanking period.
 6. An image display apparatusincluding an input unit, a computer body and a display unit, whereinsaid computer body comprises preparation means for preparing a controlsignal Sc on the basis of an control instruction inputted by said inputunit for adjusting a display picture of said display unit to producesaid control signal to said display unit, and said display unitcomprises control means for producing an adjustment signal on the basisof said control signal produced by said preparation means to adjustdisplay drive means in said display unit.
 7. An image display unitaccording to claim 6, wherein delivery of said control signal Sc fromsaid computer body and said preparation means to said control means insaid display unit is made by means of a general-purpose interface, saidpreparation means comprising signal input means, said control meanscomprising signal output means, information relative to operationsituation of said display unit capable of being transmitted through saidinterface from said display unit to said computer body.
 8. An imagedisplay apparatus including an input unit, a computer body and a displayunit, wherein said computer body comprises display processing means forpreparing a control signal Sc on the basis of an control instructioninputted by said input unit for adjusting a display picture of saiddisplay unit to produce said control signal to said display unittogether with image data produced separately for displaying an image insaid display unit, and said display unit comprises control means forpreparing video signals R, G and B and synchronizing signals Hs and Vson the basis of said image data produced by said display processingmeans and for producing an adjustment signal on the basis of saidcontrol signal produced by said display processing means to adjustdisplay drive means in said display unit.
 9. An image display apparatusaccording to claim 8, wherein said control means controls said displaydrive means in said display unit to set said display unit to be anon-display state or a state near said non-display state when said imagedata produced by said display processing means is not updated during apredetermined time.
 10. An image display apparatus including an inputunit, a computer body and a display unit, wherein said computer bodycomprises modulation means for preparing a control signal Sc on thebasis of an control instruction inputted by said input unit foradjusting a display picture of said display unit and modulating saidcontrol signal to add said control signal to an AC power supply PL, andsaid display unit comprises demodulation means for separating said addedcontrol signal Sc from said AC power supply PL to demodulate saidcontrol signal and control means for producing an adjustment signal onthe basis of said control signal Sc produced by said demodulation meansto adjust display drive means, in said display unit.
 11. An imagedisplay apparatus including a second input unit, a computer body and adisplay unit, wherein said computer body and said display unit aresupplied with a part or all of instructions inputted by said secondinput unit, and said display unit comprises preparation means forpreparing a control signal Sc on the basis of said control instructionto produce it when an instruction inputted by said input unit is acontrol instruction for adjusting a display picture of said display unitand control means for producing an—adjustment signal on the basis ofsaid control signal Sc produced by said preparation means to adjustdisplay drive means in said display unit.
 12. An image display apparatusaccording to claim 11, wherein said second input unit includes anexclusive input portion for inputting said control signal exclusively,and an instruction inputted by said exclusive input portion is suppliedto at least said display unit.
 13. An image display apparatus accordingto claim 11, wherein transmission of said instruction from said secondinput unit to said display unit is made by means of infrared rays orradio waves to thereby reduce the number of connection lines betweensaid input unit and said display unit.
 14. An image display apparatusaccording to claim 1, wherein said input unit includes a keyboard, amouse and a pen for unit.
 15. An image display apparatus according toclaim 11, wherein said input unit includes a keyboard, a mouse and a penfor unit.